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[VHDL-FPGA-Verilogsimple_ram

Description: the file about simple ram by VHDL code
Platform: | Size: 1024 | Author: pham | Hits:

[VHDL-FPGA-VerilogCPU

Description: 简易CPU设计 利用VHDL编写。包含一个可以用于检验的LPM-RAM-DQ-CPU-design VHDL
Platform: | Size: 296960 | Author: lxd | Hits:

[Internet-Network635355963606373750

Description: 本文介绍了应用FPGA实现对高速A/D转换芯片的控制电路,介绍了这一控制的设计思想,并提出了通过双口RAM实现FPGA与慢速度的单片机进行双机数据通信处理的解决方案。-   Data acquisition is an item of indispensable technology which is essential to the industrial control system. As the increasing need for speed performance of the data collection requirements, FPGA technology came into being. This paper introduces the high-speed A/D converter by using FPGA chip control circuit detailing, discussing the design of the control circuit, at the same time submitting the FPGA through dual-port RAM and slow-speed single-chip dual-computer data communications solutions. FPGA and Single-chip microcomputer mutual coordination work, control the data acquisition system, and Single-chip microcomputer with rich peripherals can be extended accordingly. The circuit of the design that use VHDL language to complete. Through the program designing and testing, the voltage information which is showed in the PC through serial port transmission collected ultimately. It is successful to realize the mutual communication between FPGA and single-chip microcomputer.
Platform: | Size: 117760 | Author: 陈建华 | Hits:

[VHDL-FPGA-Verilogrms_cal

Description: 基于VHDL的有效值求取,内含低通滤波子模块-RAM CAL with LPF by VDHL
Platform: | Size: 4096 | Author: 黎明 | Hits:

[VHDL-FPGA-Verilogsingle_port_ram

Description: Single port RAM file VHDL source code
Platform: | Size: 35840 | Author: mitch | Hits:

[VHDL-FPGA-Verilogsmall8

Description: This a sample microprocessor with a bi-directional data bus and RAM in software created in VHDL run on a cyclone 3 FPGA. -This is a sample microprocessor with a bi-directional data bus and RAM in software created in VHDL run on a cyclone 3 FPGA.
Platform: | Size: 4153344 | Author: jeofner | Hits:

[VHDL-FPGA-Verilogspram

Description: vhdl code of single port ram
Platform: | Size: 43008 | Author: vishal | Hits:

[Otherdualporttst-1_1

Description: interfacing dual port ram in vhdl
Platform: | Size: 195584 | Author: franofcholet | Hits:

[Other2

Description: 用VHDL语言设计一个8位双向可控移位寄存器。 移位寄存器由D型触发器构成,采用串入并出形式。 采用VHDL方式设计一个16х4位RAM存储器-VHDL language to design an 8-bit bidirectional shift register controllable. The shift register by a D-type flip-flops, using the string into and out of form. Way design using VHDL a bit RAM memory 16х4
Platform: | Size: 1024 | Author: 赵丽丽 | Hits:

[VHDL-FPGA-VerilogVHDL_RAM_FIFO_ROM

Description: VHDL代码实现FIFO从ROM中读取数据然后传输到RAM中-VHDL code for FIFO read data ROM to RAM and then transfer
Platform: | Size: 9634816 | Author: 胡小军 | Hits:

[Software EngineeringRAMinVHDL

Description: How to create a RAM memory in VHDL
Platform: | Size: 330752 | Author: jose | Hits:

[VHDL-FPGA-Verilogvhdl__example_fza.ir

Description: useful vhdl example contain adder-mux-counter-ram-shifter-rom-flipflop-useful vhdl example contain adder-mux-counter-ram-shifter-rom-flipflop...
Platform: | Size: 22528 | Author: mahdi | Hits:
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